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Start Over You searched for: Graduate Program Computer Science and Engineering Remove constraint Graduate Program: Computer Science and Engineering Committee Member Mahmut Taylan Kandemir Remove constraint Committee Member: Mahmut Taylan Kandemir

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1. A Logical Framework for Reasoning about Logical Specifications

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2. Design and Analysis of Heterogeneous Networks for Chip-Multiprocessors

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4. Exploring Power Reliability Tradeoffs in On-Chip Networks

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5. Exploiting Sparsity, Structure, and Geometry for Knowledge Discovery

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6. Implications of Future Technologies on the Design of FPGAs

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7. Minimizing End-To-End Interference in I/O Stacks Spanning Shared Multi-Level Buffer Caches

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8. EXPLOITING MULTI-THREADED APPLICATION CHARACTERISTICS TO OPTIMIZE PERFORMANCE AND POWER OF CHIP-MULTIPROCESSORS

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11. An Operator-Centric Mission Planning Environment to Reduce Mission Complexity for heterogeneous Unmanned Vehicles

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13. Energy-aware hardware and software optimizations for embedded systems

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14. Sparse Scientific Applications: Improving Performance and Energy Characteristics on Advanced Architectures

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15. Reasoning About Higher-Order Functions and Parameters

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17. The Control, Communication, and Computation Language (C3L): Completing the Design Cycle in Complex Distributed System Development

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19. SELF-TUNING STORAGE SYSTEMS FOR PERFORMANCE VIRTUALIZATION

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20. ORCHESTRATING THE COMPILER AND MICROARCHITECTURE FOR REDUCING CACHE ENERGY

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21. SCLABLE HYBRID SPARSE LINEAR SOLVERS

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22. CO-ADAPTING SCIENTIFIC APPLICATIONS AND ARCHITECTURES TOWARD ENERGY-EFFICIENT HIGH PERFORMANCE COMPUTING

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23. DESIGNING ENERGY-EFFICIENT AND RELIABLE CACHES AND INTERCONNECTS

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24. Secure Communications in Sensor Networks

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25. RUNTIME SUPPORT FOR EFFECTIVE MEMORY MANAGEMENT IN LARGE-SCALE APPLICATIONS

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26. THE PROBABILISTIC ASYNCHRONOUS PI-CALCULUS

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27. COMPILER DIRECTED MEMORY HIERARCHY DESIGN AND MANAGEMENT IN CHIP MULTIPROCESSORS

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30. Multimethod Solvers: Algorithms, Application And Software

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31. PERFORMANCE ANALYSIS AND VISUALIZATION FOR HIGH PERFORMANCE PARALLEL I/O

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32. Software Based Techniques for Robust Computing on Chip Multiprocessors

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34. Reducing Interference in Memory Hierarchy Resources Using Application Aware Management

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35. Power Management of Enterprise Storage Systems

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36. Managing Performance And Energy In Large Scale data Centers

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37. Software-Based Disk Power Management for Scientific Applications

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41. Dynamic Resource Management for Energy-efficiency and Quality-of-Service in Chip Multiprocessors

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42. CACHE-AWARE APPLICATION PARALLELIZATION AND OPTIMIZATION FOR MULTICORES

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43. Architecting On-Chip Interconnection Network for Future Many-Core Chip-Multiprocessors

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44. Concurrent Assemblies: A Model for Concurrent Program Execution

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45. Model-driven Memory Optimizations for High Performance Computing: From Caches to I/o

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46. Dynamic Meshing Techniques for Quality Improvement, Untangling, and Warping

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49. Algorithmic Approaches for Enhancing Speedup, Energy and Resiliency Measures of Sparse Scientific Computations

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50. Towards Improving Performance and Reliability of Cloud Platforms

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51. Design of a Smart Non-volatile Memory Controller: Architecture Modeling, Systems Analysis, Parallel I/o Processing and Scheduling Algorithms

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52. Addressing Power, Performance and End-to-end Qos in Emerging Multicores through system-wide Resource Management

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53. Compiler-based Memory Optimizations for High Performance Computing Systems

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54. Compiler Optimizations for SIMD/GPU/Multicore Architectures

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55. Parallel I/o Profiling and Optimization in Hpc Systems

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58. A Protean Attack on the Compute-storage Gap in High-performance Computing

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59. using attention to enhance efficiency in video-based computer systems

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60. An examination of Post-CMOS computing techniques using steep-slope device-based architectures

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61. Architecture-level Designs using Emerging Non-volatile Memories

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62. Improving Performance and Energy of Parallel Sparse Computations through Hybrid Linear Solvers and Model-driven Optimization

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64. EXPLOITING GRAPH EMBEDDING FOR PARALLELISM AND PERFORMANCE

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65. A Study of Parallelism-locality Tradeoffs across Memory Hierarchy

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66. Design and Analysis of Scheduling Techniques for Throughput Processors

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68. Parallelism-aware Resource Management Techniques for Many-core Architectures

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69. Reuse distance models for accelerating scientific computing workloads on multicore processors

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70. Stochastic Modeling and Optimization of Stragglers in Mapreduce Framework

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72. Irregular Graph Algorithms on Modern Multicore, Manycore, and Distributed Processing Systems

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73. Energy Optimization for Smartphones in Wireless Networks

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74. HARDWARE SOFTWARE CO-DESIGN FOR OPTIMIZING MEMORY HIERARCHY IN MANY-CORE AND MULTI-SOCKET SYSTEMS

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75. Hardware-Aware Computation Reorganization for Memory Intensive Applications

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76. Self-powered Internet-of-Things Nonvolatile Processor and System Exploration and Optimization

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77. Engineering high performance workflows for end-to-end acceleration of genomic applications

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79. LOW POWER, SECURE AND ROBUST DESIGNS OF NON-VOLATILE MEMORIES

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80. EXTRACTING BETTER PERFORMANCE FROM THE PARALLELISM OFFERED BY SSDS

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81. CHARACTERIZING AND OPTIMIZING ON-CHIP SHARED MEMORY RESOURCES USING MARKET-DRIVEN MECHANISMS

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82. Irregularity-aware Computation and Data Management in Manycore Systems

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83. Tackling the computation and memory needs of interactive workloads on next generation platforms

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84. Be(-A)ware of Data Movement: Optimizing Throughput Processors For Efficient Computations

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85. Context-Aware Design and Optimization of Embedded Deep Neural Network Architectures

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86. Optimizing Video Processing for Next-Generation Mobile Platforms

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88. PowerPrep : A power management technique for user-facing datacenter workloads

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91. A developer-centric analysis framework for programmable accelerators

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92. Modelling Parkinson's Progression using Naturally Spoken Language Features

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93. Case-Specific Lifetime Management Strategies for Long-Lasting Flash Devices

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94. Detecting and Mitigating Cache-Based Side-Channels

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95. INFERALL: COORDINATED OPTIMIZATION FOR MACHINE LEARNING INFERENCE SERVING IN PUBLIC CLOUD

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96. Technology Driven Architecture Support for Memory Hierarchies

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97. Embracing Heterogeneity in Cloud Platforms through Adaptable Resource Management Framework

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98. VAR: Vulkan API Remoting for GPU-accelerated Rendering and Computation in Virtual Machines

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