Architecture-level Designs using Emerging Non-volatile Memories

Open Access
Wang, Jue
Graduate Program:
Computer Science and Engineering
Doctor of Philosophy
Document Type:
Date of Defense:
October 13, 2014
Committee Members:
  • Yuan Xie, Dissertation Advisor
  • Yuan Xie, Committee Chair
  • Mary Jane Irwin, Committee Chair
  • Mahmut Taylan Kandemir, Committee Member
  • Xiaolong Zhang, Committee Member
  • architecture design
  • main memory
  • on-chip cache
  • non-volatile memory
  • low power
  • high performance
SRAM and DRAM have been used to build our memory systems for decades, but their scalability is facing more and more challenges in terms of leakage power and density. Meanwhile, new emerging non-volatile memory technologies (NVMs) are being explored, such as Phase-Change RAM (PCM or PCRAM), Spin-Torque Transfer RAM (STTRAM or MRAM), and Resistive RAM (ReRAM). They have common advantages of high density, low standby power and non-volatility. It could bring benefits by using NVMs to replace SRAM and DRAM in our memory systems. However, NVM technologies still have some disadvantages. First, the NVM write operation is much more expensive in terms of longer latency and higher energy. It causes negative impacts on the system performance and energy efficiency. Second, NVMs usually have limited write endurance, which brings challenges on system reliability. Last but not least, the size of NVM sense amplifier is larger, and how to maintain the area utilization is an issue. All of these NVM characteristics are caused by their basic mechanisms, and they are very difficult to be improved by changing cell designs. Therefore, new architecture techniques are necessary for mitigating these issues and building efficient and reliable systems with NVMs. In this dissertation, NVMs are evaluated as alternatives of traditional memory technologies for different memory levels. We explore NVMs as main memory systems, on-chip caches and GPGPU register files. We analyze their impact on system level and propose several techniques on architecture level to mitigate their disadvantages. We believe these techniques make NVMs more attractive in the future computer systems.