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Start Over You searched for: Degree PHD Remove constraint Degree: PHD Committee Member Vijaykrishnan Narayanan Remove constraint Committee Member: Vijaykrishnan Narayanan

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1. Towards Minimizing the Adverse Effects of Temperature on High Performance Digital Systems

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2. Design and Analysis of Heterogeneous Networks for Chip-Multiprocessors

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3. Exploring Power Reliability Tradeoffs in On-Chip Networks

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4. Redundancy and Parallelism Tradeoffs for Reliable, High-Performance Architectures

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5. Implications of Future Technologies on the Design of FPGAs

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6. RELIABILITY ANALYSIS AND OPTIMIZATION FOR NANOSCALE SYSTEM-ON-CHIP DESIGN

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7. Issues in low-power and reliable wireless commuication system design

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8. Network-on-Chip Architectures: A Holistic Design Exploration

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9. SOFT ERROR RATE SIMULATION AND INITIAL DESIGN CONSIDERATIONS OF NEUTRON INTERCEPTING SILICON CHIP (NISC)

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10. FAULT TOLERANT SIGNAL PROCESSING FOR VLSI CIRCUITS

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11. Clock Network and Phase-Locked Loop Power Estimation and Experimentation

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12. Design of High-Performance, Energy-Efficient, and Reliable Network-on-Chip (NoC) Architectures

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13. Sensor Network Interoperability and Reconfiguration through Mobile Agents

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14. DEEP SUBMICRON (DSM) DESIGN AUTOMATION TECHNIQUES TO MITIGATE PROCESS VARIATIONS

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17. EXPLORING THE MEMORY HIERARCHY DESIGN WITH EMERGING MEMORY TECHNOLOGIES

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18. Energy-aware hardware and software optimizations for embedded systems

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19. System Level Power and Reliability Modeling

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20. HIGH-PERFORMANCE SIGNAL PROCESSING ON RECONFIGURABLE PLATFORMS

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21. A Comprehensive Approach to Design Network-on-Chip Architectures for SoC/Multicore Systems

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22. A TIQ Based CMOS Flash A/D Converter for System-on-Chip Applications

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23. ORCHESTRATING THE COMPILER AND MICROARCHITECTURE FOR REDUCING CACHE ENERGY

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25. A Configurable Platform for Sensor and Image Processing

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26. Quality of Service Provisioning in Clusters

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27. DESIGNING ENERGY-EFFICIENT AND RELIABLE CACHES AND INTERCONNECTS

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28. Secure Communications in Sensor Networks

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29. DEVELOPMENT OF AN ION TIME-OF-FLIGHT SPECTROMETER FOR NEUTRON DEPTH PROFILING

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30. CONFIGURABLE ACCELERATORS FOR VIDEO ANALYTICS

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31. Addressing Reliability Issues in Performance-Critical Processor Structures

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32. Accessing Spatial Information in Resource-constrained and Resource-rich Environments

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33. A Reliable Design Flow for Platform FPGAs.

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34. Application-Aware On-Chip Networks

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35. Analysis of Failures in Nanoscale Devices

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36. SOFT ERRORS IN LOGIC CIRCUITS: ANALYSIS AND MODELING

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37. Influence of Emerging Technologies on Interconnect Architectures

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40. Power Management of Enterprise Storage Systems

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41. CLOSING THE GAP BETWEEN FPGAs AND ASICs: THE APPLICATIONS OF CLOCK SKEW SCHEDULING ON FPGAs

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42. EMBEDDED HARDWARE FACE DETECTION FOR DIGITAL SURVEILLANCE SYSTEMS

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44. DEVICE AND ARCHITECTURE CO-DESIGN FOR ULTRA-LOW POWER LOGIC USING EMERGING TUNNELING-BASED DEVICES

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46. ARCHITECTURAL LEVEL POWER ESTIMATION AND EXPERIMENTATION

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48. Design Exploration for Three-dimensional Integrated Circuits (3DICs)

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49. Modeling and Leveraging Emerging Non-Volatile Memories for Future Computer Designs

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50. VARIATION-AWARE BEHAVIORAL SYNTHESIS FOR NANOMETER VLSI CHIPS

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