A TIQ Based CMOS Flash A/D Converter for System-on-Chip Applications

Open Access
Yoo, Jincheol
Graduate Program:
Computer Science and Engineering
Doctor of Philosophy
Document Type:
Date of Defense:
December 09, 2002
Committee Members:
  • Vijaykrishnan Narayanan, Committee Member
  • Mary Jane Irwin, Committee Member
  • Kyusun Choi, Committee Chair
  • Charles Lee Croskey, Committee Member
  • Threshold Inverter Quantization (TIQ)
  • Flash ADC
  • Analog-to-Digital Converter
  • System-on-Chip (SoC)
This thesis addresses a Threshold Inverter Quantization (TIQ) based CMOS flash analog-to-digital converter (ADC) for system-on-chip (SoC) applications. The TIQ technique, which uses two cascaded CMOS inverters as a voltage comparator, has been introduced by Ali Tangel in 1999. However, this TIQ technique must be developed to satisfy recent SoC trends, which force ADCs to be integrated on the chip with other digital circuits and focus on low-power and low-voltage implementations. Thus, this thesis proposes an optimal design method for the TIQ comparator, a new encoder, two low-power applications of the TIQ flash ADC, and a new voltage comparator for better implementation in SoC applications. These four proposals contributed toward the achievement of high-speed conversion, low-power dissipation, and low-voltage operation in the TIQ flash ADC. First, an optimal design method called Systematic Size Variation (SSV) technique for the TIQ comparator reduced the impacts of the process, temperature, and power supply voltage variations. Therefore, we obtained a higher speed and resolution TIQ flash ADC. Second, a new encoder named the fat tree encoder replaced the ROM type encoder that was the speed bottleneck. Accordingly, we achieved significant improvement of speed of the TIQ flash ADC. Third, a Power and Resolution Adaptive flash ADC (PRA-ADC) and a power management method in the TIQ flash ADC reduced/managed power dissipation. By controlling the power dissipation in the comparator, we obtained a large power saving. Finally, a new Quantum Voltage (QV) comparator, which is a differential voltage comparator with the TIQ and the SSV techniques, for next generation deep sub-micron low-voltage CMOS flash ADC has reduced the noise susceptibility of the TIQ comparator. As a result of using the QV comparator, we can achieve very small voltage comparison for low-voltage operation. Also, the new comparator has a great advantage in power dissipation and noise rejection compared to the TIQ comparator. In addition to the above four contributions, simulation and fabrication results of the TIQ flash ADC are discussed in this thesis. The results show that the TIQ flash ADC achieves high-speed conversion, and has a small size, low-power dissipation, and low-voltage operation compared to other flash ADCs.