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1. Design and Analysis of Heterogeneous Networks for Chip-Multiprocessors

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Open Access

2. Redundancy and Parallelism Tradeoffs for Reliable, High-Performance Architectures

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Open Access

3. Network-on-Chip Architectures: A Holistic Design Exploration

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Open Access

4. Design of High-Performance, Energy-Efficient, and Reliable Network-on-Chip (NoC) Architectures

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Open Access

6. A Comprehensive Approach to Design Network-on-Chip Architectures for SoC/Multicore Systems

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Open Access

7. Quality of Service Provisioning in Clusters

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Open Access

8. Application-Aware On-Chip Networks

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Open Access

9. Influence of Emerging Technologies on Interconnect Architectures

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Open Access

11. system-on-chip integration of heterogeneous accelerators for perceptual computing

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Open Access

12. Design and Exploration of Accelerator-rich Multi-core Systems

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Open Access

14. Context-Aware Design and Optimization of Embedded Deep Neural Network Architectures

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Open Access

15. PowerPrep : A power management technique for user-facing datacenter workloads

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Open Access

16. A Processing-in-Memory Accelerator Architecture for Graph Analytics

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Open Access

17. Processing In-Memory Architecture Incorporating Systolic Dataflow for Deep Neural Networks

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Open Access

18. Optimization of Inter-Cache Traffic Entanglement in Tagless Caches with Tiling Opportunities

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Open Access

20. Data Reduction for Communication-efficient Machine Learning

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Open Access

21. Design of a Vision Based Assistive System for Visually Impaired Persons

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Open Access

23. AIGuide: An Augmented Reality Hand Guidance Application for People with Visual Impairments

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Open Access

25. Hardware Functional Obfuscation With Ferroelectric Active Interconnects

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26. An Analysis and Framework for Multi-label Image Classification of Insect Taxonomy with Convolutional Neural Networks

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27. DESIGN OF PROCESSING-IN-MEMORY ARCHITECTURES FOR DEEP LEARNING AND GRAPH APPLICATIONS

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29. A Scheduling Framework for Decomposable Kernels on Energy Harvesting IoT Edge Nodes

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30. Video Analytics with In-SSD Processing Approaches

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31. Optimizing Existing NLP Tasks by Leveraging Knowledge Graphs

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32. Efficient Deep Neural Networks Architectures for Video Analytics Systems

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35. Optimizing Deep Learning for Memory and Compute : A joint Algorithm-Architecture Exploration

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Open Access

36. Technology Driven Architecture Support for Memory Hierarchies

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Open Access

37. Efficiently supporting and exploiting multiple concurrent views of data in the memory hierarchy

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Open Access

38. Context-Aware Perception for Edge and Embedded Devices

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39. Co-Architecting Brain-inspired Algorithms and Hardware for Performance and Energy Efficiency

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Open Access

40. OPTIMIZING PRIVACY PRESERVING NEURAL NETWORKS EMPLOYING HOMOMORPHIC ENCRYPTION

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