A Toolchain for On-Chip Thermal Management of FPGA Designs
Open Access
- Author:
- Gulati, Rishab
- Graduate Program:
- Computer Science and Engineering
- Degree:
- Master of Science
- Document Type:
- Master Thesis
- Date of Defense:
- April 02, 2021
- Committee Members:
- Vijaykrishnan Narayanan, Thesis Advisor/Co-Advisor
Swaroop Ghosh, Committee Member
Chitaranjan Das, Program Head/Chair - Keywords:
- FPGA
Thermal Management
Hardware Architecture - Abstract:
- The FPGA industry has been growing at a staggering rate these past few years. Some of the new emerging technologies such as Artificial Intelligence (AI) and Machine Learning (ML) have fueled the FPGA market's growth. At the same time, the size of transistors has been shrinking, which results in ever-increasing chip density. Given this, the size and the complexity of designs synthesized on FPGAs has been increasing as well. These large and complex FPGA designs make it tougher to manage the on-chip thermal behavior, such as flattening the chip temperature. The industry has been calling for solutions related to a more efficient design process for managing the thermal behavior of FPGAs, and this proposed work provides precisely that. This work introduces an FPGA toolchain that would aid in managing the on-chip thermal behavior by working as a programmable heat sink for validation and testing. This toolchain consists of two components – an FPGA Heater design and a Pseudo Heat Sensor. The sole purpose of this FPGA heater design is to increase the on-chip temperature, with customizable parameters such as the clock frequency and the chip area utilization, controlling the amount of heat generated. On the other hand, the heat sensors are deployed on different parts of the FPGA chip, sensing the increase in temperature at those specific locations. This toolchain works directly on the fully implemented FPGA designs and thus provides a very accurate understanding of the on-chip thermal behavior of those designs.