Optimization of Inter-Cache Traffic Entanglement in Tagless Caches with Tiling Opportunities
Open Access
Author:
Thirucherai Govindarajan, Hariram
Graduate Program:
Computer Science and Engineering
Degree:
Master of Science
Document Type:
Master Thesis
Date of Defense:
June 24, 2021
Committee Members:
Vijaykrishnan Narayanan, Thesis Advisor/Co-Advisor John Morgan Sampson, Committee Member Chitaranjan Das, Program Head/Chair
Keywords:
Tagless cache
Abstract:
So-called "tagless" caches have become common as a means to deal with the vast L4 last level caches (LLCs) enabled by increasing device density, emerging memory technologies, and advanced integration capabilities (e.g., 3D). Tagless schemes often result in inter-cache entanglement between tagless cache (L4) and the cache (L3) stewarding its metadata. We explore new cache organization policies that mitigate overheads stemming from the inter-cache-level replacement entanglement. We incorporate support for explicit tiling shapes that can better match software access patterns to improve the spatial and temporal locality of large block allocations in many essential computational kernels.
