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Author:

Pandey, Rahul

Title:

COMPLIMENTARY III-V HETERO-JUNCTION TUNNEL TRANSISTORS FOR ENERGY EFFICIENT NANOELECTRONICS

Graduate Program:

Electrical Engineering

Keywords:

Tunnel
Tunnel Transistor
Energy
Power
Efficient
Low-power
Energy efficient
low voltage
TFET
MOSFET
CMOS
Moore's law
Transistor
on-current
steep
subthreshold
switching
sub-thermal
logic
circuits
systems
memory
semiconductors
TunnelFET
complimentary
III-V
compound semiconductors
Germanium
GeSn
Hetero-junctions
tunnel barrier engineering
quantum mechanical tunneling

File:

Download Energy_Efficient_Tunnel_Transistors_by_Rahul_Pandey.pdf

Committee Members:

Suman Datta, Dissertation Advisor/Co-Advisor
Vijaykrishnan Narayanan, Committee Chair/Co-Chair
Jerzy Ruzyllo, Committee Member
Sumeet Gupta, Committee Member
Roman Engel-Herbert, Outside Member