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Start Over Year 2014 Committee Member Raj Acharya Keyword 3D-stacked DRAM Keyword Memory Wall Keyword DRAM Keyword Sub-array Level Parallelism

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Author:: Zhang, Tao
Title:: A Study of DRAM Optimization to Break the Memory Wall
Graduate Program:: Computer Science and Engineering
Keywords:: DRAM
Memory Wall
3D-stacked DRAM
Wide IO
Activation
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Sub-array Level Parallelism
File:: Download TaoZhang-Dissertation.pdf
Committee Members:: Yuan Xie, Dissertation Advisor/Co-Advisor
Yuan Xie, Committee Chair/Co-Chair
Mary Jane Irwin, Committee Member
Vijaykrishnan Narayanan, Committee Member
Zhiwen Liu, Committee Member
Raj Acharya, Committee Member

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