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Author:

Saripalli, Vinay

Title:

DEVICE AND ARCHITECTURE CO-DESIGN FOR ULTRA-LOW POWER LOGIC USING EMERGING TUNNELING-BASED DEVICES

Graduate Program:

Computer Science and Engineering

Keywords:

Tunnel FET
Single Electron Transistor
Low Power Electronics
Heterogeneous Architecture
Variation-Aware SRAM

File:

Download VinaySaripalli-Dissertation.pdf

Committee Members:

Suman Datta, Dissertation Advisor/Co-Advisor
Suman Datta, Committee Chair/Co-Chair
Vijaykrishnan Narayanan, Committee Chair/Co-Chair
Mary Jane Irwin, Committee Member
Kyusun Choi, Committee Member
M Jeya Chandra, Committee Member
Raj Acharya, Committee Member