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Author:

Duarte, David Enrique

Title:

Clock Network and Phase-Locked Loop Power Estimation and Experimentation

Graduate Program:

Electrical Engineering

Keywords:

CPU clock energy modeling
power estimation
PLL design
low power VLSI design

File:

Download thesis.pdf

Committee Members:

William Evan Higgins, Committee Member
Kenneth Jenkins, Committee Chair/Co-Chair
Mary Jane Irwin, Committee Chair/Co-Chair
Vijaykrishnan Narayanan, Committee Member
Thomas Nelson Jackson, Committee Member