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Start Over Committee Member Vijaykrishnan Narayanan Committee Member Raj Acharya

1. RELIABILITY ANALYSIS AND OPTIMIZATION FOR NANOSCALE SYSTEM-ON-CHIP DESIGN

open_access
Open Access
Author:
Vaidyanathan, Balaji
Title:
RELIABILITY ANALYSIS AND OPTIMIZATION FOR NANOSCALE SYSTEM-ON-CHIP DESIGN
Graduate Program:
Computer Science and Engineering
Keywords:
circuit reliability
system-on-chip
File:
Download thesis.pdf
Committee Members:
Yuan Xie, Dissertation Advisor/Co-Advisor
Yuan Xie, Committee Chair/Co-Chair
Vijaykrishnan Narayanan, Committee Member
Mary Jane Irwin, Committee Member
Heng Xu, Committee Member
Anthony S Oates, Committee Member
Raj Acharya, Committee Member

2. DEVICE AND ARCHITECTURE CO-DESIGN FOR ULTRA-LOW POWER LOGIC USING EMERGING TUNNELING-BASED DEVICES

open_access
Open Access
Author:
Saripalli, Vinay
Title:
DEVICE AND ARCHITECTURE CO-DESIGN FOR ULTRA-LOW POWER LOGIC USING EMERGING TUNNELING-BASED DEVICES
Graduate Program:
Computer Science and Engineering
Keywords:
Tunnel FET
Single Electron Transistor
Low Power Electronics
Heterogeneous Architecture
Variation-Aware SRAM
File:
Download VinaySaripalli-Dissertation.pdf
Committee Members:
Suman Datta, Dissertation Advisor/Co-Advisor
Suman Datta, Committee Chair/Co-Chair
Vijaykrishnan Narayanan, Committee Chair/Co-Chair
Mary Jane Irwin, Committee Member
Kyusun Choi, Committee Member
M Jeya Chandra, Committee Member
Raj Acharya, Committee Member

3. Utilizing Graphics Processing Units for Rapid Facial Recognition using Video Input

open_access
Open Access
Author:
Gala, Charles Joseph
Title:
Utilizing Graphics Processing Units for Rapid Facial Recognition using Video Input
Graduate Program:
Computer Science and Engineering
Keywords:
facial recognition
graphics processing unit
GPU
CUDA
detection
tracking
recognition
live streaming data
File:
Download CharlesGala_thesis_final.pdf
Committee Members:
Raj Acharya, Thesis Advisor/Co-Advisor
Bruce Einfalt, Thesis Advisor/Co-Advisor
Robert Collins, Thesis Advisor/Co-Advisor
Vijaykrishnan Narayanan, Thesis Advisor/Co-Advisor

4. A Study of DRAM Optimization to Break the Memory Wall

open_access
Open Access
Author:
Zhang, Tao
Title:
A Study of DRAM Optimization to Break the Memory Wall
Graduate Program:
Computer Science and Engineering
Keywords:
DRAM
Memory Wall
3D-stacked DRAM
Wide IO
Activation
Precharge
Refresh
Sub-array Level Parallelism
File:
Download TaoZhang-Dissertation.pdf
Committee Members:
Yuan Xie, Dissertation Advisor/Co-Advisor
Yuan Xie, Committee Chair/Co-Chair
Mary Jane Irwin, Committee Member
Vijaykrishnan Narayanan, Committee Member
Zhiwen Liu, Committee Member
Raj Acharya, Committee Member