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1. Design and Analysis of Heterogeneous Networks for Chip-Multiprocessors

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2. Redundancy and Parallelism Tradeoffs for Reliable, High-Performance Architectures

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3. Design of High-Performance, Energy-Efficient, and Reliable Network-on-Chip (NoC) Architectures

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6. Communication-Driven Coscheduling in Clusters

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8. Attack Attribution for Distributed Denial-of-Service and Worm Attacks

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11. A Comprehensive Approach to Design Network-on-Chip Architectures for SoC/Multicore Systems

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12. Quality of Service Provisioning in Clusters

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14. DEVELOPING A JAVA BINARY OBJECT TECHNIQUE FOR TRANSFERRING HIGH VOLUMES OF DATA IN DATA CENTERS

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15. Adaptive Social Networking With Applications To Security

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16. Application-Aware On-Chip Networks

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17. Design and Analysis of Ultra-wideband Ad Hoc Covert Wireless Radar-Comm Networks

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18. Influence of Emerging Technologies on Interconnect Architectures

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19. Dynamic Shared Resource Management for Providing Predictable Performance in Multicore Processors

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20. PERFORMANCE ANALYSIS AND VISUALIZATION FOR HIGH PERFORMANCE PARALLEL I/O

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22. Design and Analysis of Wireless and Mobile Networks

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23. Communication and Scheduling in Clusters : A User-Level Perspective

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24. QUALITY OF SERVICE (QoS) PROVISIONING IN THE INTERNET USING FLOW ESTIMATION

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25. Managing Performance And Energy In Large Scale data Centers

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26. A DATA CENTRIC FRAMEWORK FOR MOBILE TARGET TRACKING AND DATA DISSEMINATION IN WIRELESS SENSOR NETWORKS

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27. NETWORK QUEUE MANAGEMENT AND CONGESTION CONTROL IN INTERNET AND WIRELESS NETWORKS

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28. Spatial Network Services in Location-Aware Sensor Networks

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29. Information Sharing in Vehicular Ad Hoc Networks

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31. Towards Improving Performance and Reliability of Cloud Platforms

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32. Design of a Smart Non-volatile Memory Controller: Architecture Modeling, Systems Analysis, Parallel I/o Processing and Scheduling Algorithms

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33. Addressing Power, Performance and End-to-end Qos in Emerging Multicores through system-wide Resource Management

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34. system-on-chip integration of heterogeneous accelerators for perceptual computing

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35. Provisioning and Harnessing Energy Storage in Datacenters

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37. A Study of Parallelism-locality Tradeoffs across Memory Hierarchy

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38. Design and Analysis of Scheduling Techniques for Throughput Processors

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39. Parallelism-aware Resource Management Techniques for Many-core Architectures

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40. Stochastic Modeling and Optimization of Stragglers in Mapreduce Framework

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41. Pushing the power and performance envelope of Next-generation Handheld platforms

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42. Design and Exploration of Accelerator-rich Multi-core Systems

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46. EXTRACTING BETTER PERFORMANCE FROM THE PARALLELISM OFFERED BY SSDS

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47. APPLYING DEEP LEARNING TECHNIQUES TO GENERATE MEDICAL IMAGES

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48. Tackling the computation and memory needs of interactive workloads on next generation platforms

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49. Be(-A)ware of Data Movement: Optimizing Throughput Processors For Efficient Computations

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50. AUTOMATED VISUAL STORYTELLING POST-EDITING

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51. Context-Aware Design and Optimization of Embedded Deep Neural Network Architectures

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53. Towards maximizing the efficiency of datacenter power and server infrastructure

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54. Ensuring Service Integrity in Cloud Computing

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56. Ultrasound Medical Image Processing with Improved Segmentation of Substantia Nigra Hyperechogenicity using Deep Neural Networks

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57. BioPose-3D and PressNet-KL: A Path to Understanding Human Pose Stability from Video

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59. Optimizing Video Processing for Next-Generation Mobile Platforms

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61. Adapting Key-Value Storage Systems to Minimize Cost in the Public Cloud

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62. Quantitative Privilege Separation with Pointer Supports

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63. PowerPrep : A power management technique for user-facing datacenter workloads

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66. Enhancing Ad-blocking Systems for Better Web Browsing Security and Privacy

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67. Applications of the compacted de bruijn graph in Comparative genomics

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68. Subject Category Classification of Scholarly Papers Using Deep Attentive Neural Networks

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71. Vessel Analysis in Narrow Band Imaging Bronchoscopic Video

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72. High frequency ultrasound imaging with thin-film devices and embedded system

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74. Processing In-Memory Architecture Incorporating Systolic Dataflow for Deep Neural Networks

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76. An Automated Framework for Flash ADC Design and Analysis

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77. Global Permission Derivation Chain: Granting and Revoking Permissions Using a Distributed Ledger

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78. Optimization of Inter-Cache Traffic Entanglement in Tagless Caches with Tiling Opportunities

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79. Using Female Alignment Features to Identify Reads from the Y Chromosome in Whole Genome Sequencing with Nanopore Data

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83. GRAPH AND TRAJECTORY MINING: FRAMEWORKS,ALGORITHMS AND APPLICATIONS

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84. SELECTION ALGORITHMS FOR TRANSISTOR QUANTIZATION ADC’S BASED ON DYNAMIC PROGRAMMING

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87. Design and Implementation of an Automated Experimentation Facility for a Reconfigurable Geo-Distributed Key-Value Store

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89. An Eyes and Hands Model: Extending Visual and Motor Modules for Cognitive Architectures

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90. NOBLER : Non Blocking Reconfiguration Protocol For Linearizable Distributed Data Store

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92. Building a Secure and Privacy-Preserving Smart Camera System

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94. A developer-centric analysis framework for programmable accelerators

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96. Modelling Parkinson's Progression using Naturally Spoken Language Features

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97. Attack Resilience of Cache Replacement Policies: Implementation and Experimentation In SDN

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98. Case-Specific Lifetime Management Strategies for Long-Lasting Flash Devices

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99. Detecting and Mitigating Cache-Based Side-Channels

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100. Adversarial Attacks and Representation Learning for Graph-structured Data

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