FULLY INTEGRATED CMOS ULTRASOUND TRANSCEIVER CHIP FOR HIGH-FREQUENCY HIGH-RESOLUTION ULTRASONIC IMAGING SYSTEMS
Open Access
- Author:
- Kim, In Soo
- Graduate Program:
- Electrical Engineering
- Degree:
- Doctor of Philosophy
- Document Type:
- Dissertation
- Date of Defense:
- June 30, 2009
- Committee Members:
- Kyusun Choi, Dissertation Advisor/Co-Advisor
Kyusun Choi, Committee Chair/Co-Chair
Thomas Nelson Jackson, Committee Chair/Co-Chair
Richard Laurence Tutwiler, Committee Member
Suman Datta, Committee Member
Susan E Trolier Mckinstry, Committee Member
Nadine B Smith, Committee Member - Keywords:
- ultrasound imaging
analog-digital converter
Ultrasound transceiver - Abstract:
- Ultrasound techniques are common for diagnostic imaging and often supersede X-ray imaging in medical sectors. Recently studies for imaging smaller organs or surfaces, such as skin, the gastrointestinal tract, and intravascular blood vessels, have emerged utilizing ultrasounds with frequencies over 20 MHz. A need remains for better clinical ultrasound imaging for detecting tumors and micro-sized tissues in vivo without the use of biopsy. In addition, a recent demand for portable ultrasound imaging systems in medical services has emerged. However, conventional ultrasound imaging systems have complicated electronics and high voltage transducers connected via bulky and expensive cables. Thus, over two decades many researchers have tried to miniaturize ultrasound imaging systems, and applied mixed-signal IC design techniques for integrating the front-end electronics on a single IC chip. However, no one has yet achieved an ultrasound imaging system with a fully integrated, custom-designed front-end IC chip that combines transmitters and receivers with high-resolution A/D converters and high-capacity on-chip memory devices. The proposed CMOS ultrasound transceiver chip enables development of portable high-resolution, high-frequency ultrasonic imaging systems. The transceiver chip design incorporates closed-coupled thin film ultrasound transducer array which operates with a 3.3 V power supply. In addition, a prototype chip, supported by digital beamforming system architecture, contains 16 receive and transmit channels with preamplifiers, Time-Gain compensation amplifiers, multiplexed Analog-to-Digital (A/D) converter with 3 Kbyte on-chip SRAM, and 50-MHz resolution time-delayed excitation pulse generators. By utilizing a shared A/D converter architecture, the numbers of A/D converters and SRAMs are reduced to one, although typical digital beamforming systems need 16 A/D converter for 16 receive channels. The carefully designed preamplifier minimizes stray capacitance and resistance between the transducers and the transceiver chip for ease of impedance matching and shows 100 MHz bandwidth at a gain of 20 dB. The VGA shows 23 dB linear gain, control range with 250 MHz bandwidth. The implemented TIQ ADC (Threshold Quantization Inverter A/D converter) achieves fast data conversion speed. Specified 6-bit resolution at a conversion speed of 250 MS/s was achieved. Further, this study presents a highly efficient TIQ comparator design methodology based on an analytical model for TIQ ADCs. The TIQ technique has gained importance in high speed flash A/D converters due to their fast data conversion speeds. The key to TIQ comparators’ designs is to generate different-sized TIQ comparators for an n-bit A/D converter; however, this technique is difficult and time-consuming for a higher-bit A/D converter. Thus, this thesis suggests a design algorithm based on MOSFET’s current SPICE model, and a customized program that automatically generates the TIQ comparators. The proposed methodology improves TIQ ADC design accuracy by 55% and reduces design time by approximately by 75%. To substantiate the technology, ultrasound signal acquisition experiments include pitch mode, catch mode, and pitch–catch mode tests, using the thin film ultrasound transducer arrays and the high frequency composite transducer arrays. The experimental results demonstrate the viability of the proposed chip architecture and designs, and the feasibility of the proposed ultrasound imaging system.