An Exploration into the Security Viability of RISC-V Systems and Supply Chain
Open Access
- Author:
- De, Asmit
- Graduate Program:
- Computer Science and Engineering
- Degree:
- Doctor of Philosophy
- Document Type:
- Dissertation
- Date of Defense:
- April 26, 2021
- Committee Members:
- Trent Jaeger, Major Field Member
Peng Liu, Outside Unit & Field Member
Swaroop Ghosh, Chair & Dissertation Advisor
John Sampson, Major Field Member
Chitaranjan Das, Program Head/Chair - Keywords:
- RISC-V
Hardware Security
Systems Security
Supply Chain Vulnerability
Memory Corruption Vulnerabillity
Hardware Trojan
System-on-chip - Abstract:
- RISC-V is a promising open-source architecture that have gained a lot of traction in the recent years. The architecture is primarily targeted towards low-power embedded devices and SoCs, however, due to its flexibility and customizability it can also be adapted to other applications such as machine learning accelerators and data-center microprocessors. Due to the open platform, RISC-V SoCs allow rapid prototyping and faster time-to-market. This is made possible due to the distributed nature of the semiconductor supply chain, such as sourcing certain components from IP vendors and using third party foundries. However, this also poses security concerns. For embedded devices such as IoTs, RISC-V often allows programs and applications to run bare-metal on the system. Such applications have full access to the underlying memory subsystem, and thereby opens up the risk of memory vulnerabilities, if not designed with proper security practices. Moreover, the involvement of several third parties also makes the supply chain vulnerable to IP theft and IC piracy. In this dissertation, we explore different hardware accelerated security designs for mitigating several system security vulnerabilities. To further secure the design development stack of SoCs, we explore hardware security principles for preventing reverse engineering and IP design theft.