Reconfigurable Accelerators for Neuromorphic Systems

Open Access
Author:
Dantara, Dharav J
Graduate Program:
Electrical Engineering
Degree:
Master of Science
Document Type:
Master Thesis
Date of Defense:
None
Committee Members:
  • Vijaykrishnan Narayanan, Thesis Advisor
Keywords:
  • FPGA Acceleration
  • Bio-Inspired Vision
Abstract:
Computer Vision and its applications are gaining grounds especially in the areas of surveillance, object recognition, unmanned vision, cognitive robotics etc. Researchers are working towards revolutionizing the underlying technologies for unmanned sensor systems. Recently Neuromor- phic vision algorithms has attracted a lot of attention due to their robustness and classi cation accuracy. To this e ort we seek to emulate the mammalian visual pathway by implementing ad- vanced models and algorithmic emulations from retina to the visual cortex. The objective of the e ort is to surpass regular engineering approaches, achieving signi cant improvements in size, weight, power, and performance (SWaPP). The goal is to develop an unattended, standalone system that can recognize relevant objects in a wide range of ambient and environmental condi- tions. The challenge however is to develop robust capabilities for object recognition in real-time with high probability of detection. Although GPU provide a great deal of processing power and acceleration, they are not ideal especially when compared to FPGA's for a stand alone system because of its higher power requirements. This thesis describes the FPGA based architectural design and implementation of critical modules as part of 2 important mammalian vision inspired algorithms: Saliency based Visual Attention and Hierarchial Models of Object Recognition, HMAX. Recon gurable hardware such as FPGAs are being increasingly employed for accelerating such compute-intensive applications. The goal of this work is to accelerate these algorithms to provide real time capability and obtain better performance per watt numbers when compared to existing CPU and GPU implementations.