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1. Reducing Interference in Memory Hierarchy Resources Using Application Aware Management

open_access
Open Access
Author:
Muralidhara, Sai Prashanth
Title:
Reducing Interference in Memory Hierarchy Resources Using Application Aware Management
Graduate Program:
Computer Science and Engineering
Keywords:
Multicores
memory hierarchy
caches
DRAM
File:
Download Dissertation.pdf
Committee Members:
Mahmut Taylan Kandemir, Dissertation Advisor/Co-Advisor
Mahmut Taylan Kandemir, Committee Chair/Co-Chair
Padma Raghavan, Committee Member
Mary Jane Irwin, Committee Member
Qian Wang, Committee Member

2. A Study of DRAM Optimization to Break the Memory Wall

open_access
Open Access
Author:
Zhang, Tao
Title:
A Study of DRAM Optimization to Break the Memory Wall
Graduate Program:
Computer Science and Engineering
Keywords:
DRAM
Memory Wall
3D-stacked DRAM
Wide IO
Activation
Precharge
Refresh
Sub-array Level Parallelism
File:
Download TaoZhang-Dissertation.pdf
Committee Members:
Yuan Xie, Dissertation Advisor/Co-Advisor
Yuan Xie, Committee Chair/Co-Chair
Mary Jane Irwin, Committee Member
Vijaykrishnan Narayanan, Committee Member
Zhiwen Liu, Committee Member
Raj Acharya, Committee Member

3. Architecting Byte-addressable Non-volatile Memories for Main Memory

open_access
Open Access
Author:
Poremba, Matthew Raymond
Title:
Architecting Byte-addressable Non-volatile Memories for Main Memory
Graduate Program:
Computer Science and Engineering
Keywords:
Computer Memory
Non-Volatile Memory
DRAM
Memory Scheduling
Memory Modeling
Memory Simulation
File:
Download Poremba-Dissertation.pdf
Committee Members:
John Morgan Sampson, Dissertation Advisor/Co-Advisor
Yuan Xie, Committee Chair/Co-Chair
Vijaykrishnan Narayanan, Committee Member
Mary Jane Irwin, Committee Member
William Kenneth Jenkins, Committee Member

4. Tackling the Challenges in Enabling Processing in Memory in DDR-DRAM Systems

restricted_to_institution
Restricted (Penn State Only)
Author:
Balakrishna Rai, Siddhartha
Title:
Tackling the Challenges in Enabling Processing in Memory in DDR-DRAM Systems
Graduate Program:
Computer Science and Engineering
Keywords:
Processing in Memory
Bank level In Memory Processing
DRAM
Memory
NUMA capability for Bank Level In Memory Processing
LLM
File:
Login to Download
Committee Members:
Chitaranjan Das, Program Head/Chair
Vijaykrishnan Narayanan, Major Field Member
Mahmut Kandemir, Major Field Member
Anand Sivasubramaniam, Chair & Dissertation Advisor
Saptarshi Das, Outside Unit & Field Member